Index: src/ggml-cpu/simd-mappings.h
--- src/ggml-cpu/simd-mappings.h.orig
+++ src/ggml-cpu/simd-mappings.h
@@ -14,7 +14,9 @@
 #include <arm_neon.h>
 #endif
 
-#if defined(__riscv_v_intrinsic)
+// __riscv_v_intrinsic reports compiler API support and can be defined without
+// enabling V; use the ISA feature macro to select RVV code.
+#if defined(__riscv_v)
 #include <riscv_vector.h>
 #endif
 
@@ -1273,7 +1275,7 @@ static inline void __lzs_f16cx4_store(ggml_fp16_t * x,
 #define GGML_BF16_FMA_HI(acc, x, y) \
     (acc) = GGML_F32x4_FMA((acc), GGML_BF16_TO_F32_HI(x), GGML_BF16_TO_F32_HI(y))
 
-#elif defined(__riscv_v_intrinsic)
+#elif defined(__riscv_v)
 
 // compatible with vlen >= 128
 
